SK Hynix Unpacks Advanced Packaging Technologies, Including Intel EMIB, For Its Next-Gen HBM Memory As It Eyes 3D Structures For The Future

SK hynix has unveiled a series of advanced packaging technologies for its next-generation High Bandwidth Memory (HBM), a move detailed during the 2026 Flash Memory Summit (FMS) conference. According to reporting from Wccftech, the company is incorporating Intel's Embedded Multi-die Interconnect Bridge (EMIB) to enhance its memory solutions. A key technical achievement highlighted by the Seoul Economic Daily is the development of NAND-linked memory, which reportedly allows SK hynix to reduce DRAM usage to one-16th. This strategic pivot aims to optimize the physical architecture of memory units to support the increasing demands of high-performance computing. Coverage from various outlets emphasizes a fundamental shift in how memory hardware is developed.

Maeil Business Newspaper (매일경제) reports that the competition surrounding HBM is no longer focused solely on the performance of the memory itself, but has shifted toward packaging technology. This transition suggests that the way memory chips are integrated and connected is now the primary differentiator in the market. ServeTheHome has specifically tracked how HBM capacity and bandwidth have increased across successive generations, illustrating the trajectory that has led to these current packaging innovations. The context for these developments is the broader evolution of High Bandwidth Flash, which Forbes notes has seen significant advances during the 2026 FMS Conference. As memory requirements for artificial intelligence and data processing grow, the industry is moving toward more complex, three-dimensional integration.

The move toward 3D structures, as noted by Wccftech, represents a long-term architectural goal for SK hynix to overcome the physical limitations of traditional 2D layouts. By linking different types of memory, such as NAND and DRAM, the company is attempting to create more efficient storage hierarchies. Moving forward, the industry will be watching the implementation of these 3D structures and the continued integration of Intel's EMIB within SK hynix's product roadmap. The primary focus remains on whether the reduction in DRAM usage via NAND-linking can be scaled across multiple product lines. Further updates from the FMS Conference and technical evaluations of the new packaging methods will likely determine if this shift in competition from performance to packaging becomes the permanent industry standard for all HBM manufacturers.